From Machelen to Dortmund: Two Days on the Front Line of the Technology Economy

As a technology investor, I regularly visit companies. Factory tours, CFO meetings, R&D presentations, it all comes with the job. The two-day KBCS Frontier Technology Tour on March 9 and 10 was one such experience. Together with my colleague, Matisse Cappon, and a select group of institutional investors, we travelled from a Belgian data center to the cleanest cleanroom in Europe, from a German chipmaker to a growing player in compound semiconductors.

LCL Data Center, Machelen: data centers, the invisible backbone

The first stop was LCL Data Centers in Machelen, a stone’s throw from the Brussels ring road. Anyone driving past the unassuming industrial building would hardly suspect that behind its walls sits one of Belgium’s most densely populated telecom hubs, with no fewer than 40 telecom operators under one roof.

LCL’s founder outlined a compelling entrepreneurial story. Thirty years ago, he first built Eurofiber, one of the earliest private fiber networks in Belgium and the Netherlands. After the dot-com crisis, he acquired an empty data center building from the bankruptcy estate of KPN Quest for just €120,000, even though it had originally been worth €3 million. Today, LCL manages multiple sites in Brussels North, Antwerp, Brussels West and Wallonia, backed by infrastructure investor I4B (The Belgian Infrastructure Fund), and has delivered stable annual growth of around 10%. What made the presentation particularly interesting for us as investors were the structural insights into how data centers actually function as an asset class.

Customer stickiness as the core advantage. LCL serves telecom operators, system integrators, government agencies and enterprise end customers. Once a customer places its IT infrastructure in a data center, the barrier to exit becomes extremely high. Contracts run for five years on average, but for larger deals, 10+5+5 structures are the norm. One hyperscaler hosted by LCL signed a ten-year contract with two extension options. That makes the revenue structure exceptionally predictable, comparable to airport or utility infrastructure.

The AI inference opportunity. LCL is currently building a new 9-megawatt vertical data center at its Machelen site, vertical because buildable land in Flanders has become extremely scarce. The founder was explicit about the strategic rationale: the new building is partly intended for AI workloads from Belgian enterprise customers. His argument is persuasive: large language models are trained in hyperscaler infrastructure, but inference, the actual execution of AI queries, requires low latency. From its Machelen site, LCL can serve all of Belgium within one and a half milliseconds. That is a structural advantage for applications where response time matters.

Energy as a strategic asset. The most urgent bottleneck is not technology, but power. LCL has reserved 24 megawatts of grid capacity at its Machelen site, a decision taken years ago that now looks like gold. For new projects, capacity is becoming increasingly scarce: at one of its other sites, an initially requested 150 MW was reduced to 50 MW, and at a third location to just 1.5 MW. Congestion on the distribution grid is a European phenomenon, driven by industrial electrification, EV adoption and the data center boom itself. For LCL, the political framework around Ventilus and the further build-out of nuclear capacity in Belgium therefore has existential importance.

Cooling and EU taxonomy. A less visible but increasingly relevant theme is cooling. With the rise of GPU clusters, where a single rack can consume up to 140 kW versus 5–10 kW for traditional IT, air cooling is no longer sufficient. Liquid cooling directly at the GPU rack is becoming the new standard, and in that context LCL is working with Nvidia via a reference architecture. At the same time, LCL is replacing legacy cooling systems that use older refrigerants in order to comply with the EU Taxonomy threshold (GWP < 675). The CFO expects significant capex in 2026–2027 for cooling upgrades at the main sites.

The return-on-investment parameters shared during the presentation were equally illuminating: a payback period of around seven years and a target return of 15% IRR on new builds, with buildings and electrical installations depreciated over 20 years.

IMEC, Leuven: the village square of the global chip industry

After a short and insightfull lunch with Melexis’ CFO, we continued in IMEC’s headquarters in Leuven for one of the most insightfull presentations of the tour. “It takes a village to build a chip” is a phrase often heard in the semiconductor industry. IMEC is that village square in a very literal sense: an open innovation hub where more than 6,500 researchers from 100 nationalities work together with an ecosystem of over 650 partners, ranging from materials suppliers to fabless chip designers and foundries such as TSMC.

The technology roadmap. The IMEC presenter took us through the history of Moore’s Law, from Jack Kilby’s first germanium integrated circuit in 1958, through Robert Noyce’s silicon dominance, to today’s challenges in 2D and 3D scaling. Where transistor shrink used to deliver performance gains almost automatically, the era of “happy scaling”, further progress today requires fundamentally different approaches: strain engineering, high-k metal gates, and now 3D integration in which logic, memory and interconnects are stacked vertically. IMEC typically runs two nodes ahead of industrial production and has recently announced the NanoIC pilot line for system integration below 2 nanometers.

Open innovation as a business model. IMEC is a non-profit, but finances itself primarily through industrial revenues, a strikingly high ratio compared with institutes such as Fraunhofer and CEA-Leti. Partners pay both for participation in shared pre-competitive research programs, with associated licensing rights to background IP, and for bilateral collaboration and services through IC-link, the commercial arm that provides turnkey chip development and production aggregation.

Venturing: the third pillar. The most surprising part of the IMEC session was the explanation of its venturing activity, launched eight years ago as a strategic initiative. Since 2018, 35 spin-offs have been created and around 20 external ventures supported using IMEC technology. Two of those (PsiQuantum and Celestial AI) have since grown into unicorns (>€1 billion), while nine have become “soonicorns”, companies on strong growth trajectories. Last year alone, the portfolio universe raised €1.8 billion in fresh capital.

The speaker referred, among others, to PsiQuantum, a Boston-based company now seen as one of the world leaders in photonic quantum computing. The company is now valued at around $7 billion and has already raised $3 billion in capital. Their fund was the only early European investor and entered at a valuation roughly twenty times lower than it is today.

Celestial AI was also highlighted. The company develops photonic interconnect technology for AI data centers: instead of using electrical data transfers between chips, it uses optical communication, allowing massive amounts of data to be moved with far lower energy consumption and latency. That is critical in the age of large-scale AI models, where the bottleneck is increasingly not compute power itself, but bandwidth between chips and memory.

IMEC Ventures was Celestial AI’s first investor, with an initial $1 million investment. Since then, the company has raised around $5.5 billion in capital, illustrating the scale of value creation possible in such deep-tech journeys. The technology also attracted the attention of major players in the semiconductor value chain: Marvell Technology, one of the core holdings in the Econopolis Exponential Technologies Fund, ultimately acquired Celestial AI to further strengthen its position in AI data center connectivity.

Three spin-offs stood out in particular. Axelera AI develops edge AI processors and announced a new $250 million financing round two weeks before our visit. Vertical Computers is working on a radically different memory architecture: magnetic memory grown directly on top of processor logic, structurally addressing the data-to-processor bottleneck that accounts for as much as 80% of energy consumption in current AI inference systems. Last year, the company closed a €56 million seed round. A third player, IO, works on image sensor innovation for mobile applications and also raised €50 million.

The strategic logic behind IMEC Ventures is clear. Deep-tech startups seeking to validate a disruptive manufacturing process often run into a classic chicken-and-egg problem: too small to gain access to the production lines of players such as TSMC or Samsung, yet too ambitious for an academic laboratory. IMEC breaks that deadlock by giving startups access to more than €4 billion of production and R&D infrastructure, combined with the world’s best chip experts and direct links into the broader semiconductor ecosystem.

ASML: the physics of today and the future

On the margins of the IMEC visit, we were given a rare opportunity: an extensive technical briefing by ASML, the Eindhoven-based company that can rightly be called the backbone of the modern semiconductor industry.

The relationship between ASML and IMEC dates back to 1984, the founding year of both. That is no coincidence: they quite literally grew up alongside one another, separated by only a few dozen kilometers. Today, around forty ASML employees work full-time on the IMEC campus in a dedicated joint program. For ASML, IMEC is more than a customer or research partner: it is the place where new tools are tested before entering high-volume production, independent of the direct interests of individual chipmakers. That independence, IMEC works with all the major players simultaneously, makes the collaboration uniquely valuable. The ASML speaker put it well: because IMEC, as a neutral party, has access to the processes and designs of dozens of manufacturers at once, ASML can learn what customers truly need, free from the commercial noise that inevitably comes with direct customer interaction.

The simple equation that explains everything

A large part of the technical presentation revolved around one formula: the critical dimension (CD), the smallest structure that can be printed on a chip, is proportional to the wavelength of the light divided by the numerical aperture of the optical system. This seemingly simple relationship has dictated ASML’s roadmap, and with it the roadmap of the entire semiconductor industry, for the past forty years.

Over time, several generations of lithography followed, named after the type of light used: G-line and I-line (ultraviolet lamps), then ArF lasers with a wavelength of 193 nanometers, and today EUV using extreme ultraviolet light at 13.5 nanometers. With each new generation, either the wavelength of the light became shorter or the numerical aperture of the optics was increased. Both improve resolution, making it possible to project ever smaller transistor structures onto silicon.

EUV marks a fundamental break with previous generations: the light is no longer transmitted through the reticle but reflected from it, because EUV is absorbed by both air and glass. The system therefore operates entirely in vacuum. The plasma generators that produce the EUV light are themselves already as large as the machines we had seen earlier in the cleanroom.

High-NA: the next frontier

The most strategically relevant part of the presentation concerned the High-NA EUV tool (numerical aperture 0.55), the most advanced scanner in the world. ASML knew two to four years before first delivery that this tool would bring new challenges. In response, ASML, in close collaboration with IMEC, built a High-NA lab where customers could access the technology before receiving their own systems. The result: more than 10,000 wafers processed for customers such as IBM, TSMC, Hynix and Samsung, using only their own designs and processes. The results were presented at the SPIE conference in February this year and show that the tool is ready for further scale-up toward high-volume manufacturing.

IMEC’s first High-NA tool will arrive next week, transported on no fewer than eighteen trucks. If you happen to be driving on the E19 between the Netherlands and Machelen in the coming days, keep your eyes open: one of those trucks might pass you by. If you spot one, feel free to send me a photo by email.

Three dimensions instead of two: the quiet revolution in chip architecture

An equally important theme was the shift toward three-dimensional chip architectures. The classic 2D shrink, packing transistors ever more densely on a flat plane, is approaching its limits. What is now gaining ground is backside power delivery: routing power rails not from the front side of the chip, but from the backside. That requires flipping and thinning down the original wafer, after which the connections to the transistors must be positioned with an accuracy of around two nanometers. The speaker admitted that even after nearly thirty years in the field, he still gets goosebumps thinking about that margin of precision: “it’s like trying to understand how far the stars are from us.”

In parallel, interest is growing in optical interconnects as a replacement for the energy-hungry electrical links between memory and logic in HBM stacks, a theme closely aligned with the agenda of the Econopolis Exponential Technologies Fund.

2026: the bet on fab readiness

The Q&A section was particularly interesting for investors in ASML shares. The broad 2026 revenue guidance of €34 billion to €39 billion, a €5 billion range, is essentially not uncertainty about demand, but uncertainty about execution speed on the customer side. The central question is whether chipmakers can prepare their cleanrooms, foundations and infrastructure quickly enough to actually install the tools delivered and bring them into production.

In immersion systems, a striking change in direction took place at the end of 2025: customers who until October had been asking for production to be wound down suddenly reversed course in November and December. Lead times for immersion are short, but those who did not order are now at the back of the queue, creating a potential constraint for the upper end of the guidance range.

One of the sharpest questions in the session, asked by the undersigned, concerned a report published that night suggesting that SK Hynix was willing to pay a 15% to 20% surcharge for accelerated delivery of EUV tools. The answer was diplomatic but instructive: customer-specific information is neither confirmed nor denied. What was clarified, however, is that ASML fundamentally does not use dynamic pricing based on supply and demand. The company does offer “fast installs,” where test cycle time can be shortened by around four weeks by skipping non-critical tests, but this has no impact on the sales price. Any additional services are billed separately. The logic is strategic: a monopolist that uses its market position to drive up prices sows the seeds of the next generation of competitors. ASML far prefers a symbiotic relationship with its customers and tries to help them wherever possible.

A related question touched on revenue recognition: if customers ask for earlier shipment and therefore earlier revenue booking, that requires explicit agreement with both accountants and the customer on the timing of recognition. This is currently at an early stage of exploration.

China: cautious optimism with a geopolitical caveat

When asked about China, the answer was nuanced but informative. The four major players (CXMT, YMTC, SMIC and Hua Hong Semiconductor) are well served and their trajectories are reasonably predictable. Here too, the real bottleneck for 2026 is fab readiness: Chinese memory makers must prepare their fabs before they can take delivery of the tools they have ordered. Beyond the established names, there is a long tail of smaller Chinese chipmakers still learning the manufacturing process, a slow and difficult path, since every process step must be mastered at the highest level in order to achieve acceptable yields.

What stood out was the tone on the geopolitical dimension: ASML, and by extension Dutch industrial and defense policy, has learned that the U.S. is no longer a self-evident protective ally. Europe must rebalance its economic and defense interests, a subtle but significant shift in the strategic language of a company that until recently spoke about export controls with great diplomatic caution.

What this means for the us

The session confirmed three investment themes we have been following for some time. First, ASML’s pricing discipline is a strategic choice, not a weakness: it protects the long-term relationships that form the core of its monopoly position. Second, the shift from 2D shrink to 3D integration extends the relevance of lithography, and therefore of ASML, into architectural layers that until recently lay outside the lithography domain. Third, the bottleneck for growth in 2026 does not lie with ASML itself, but with the fab readiness of its customers. Anyone able to assess that execution speed accurately has an information advantage.

Day 2 – Germany: from automotive chips to compound semiconductors

After an informal dinner in Dortmund, the second day began with visits to two companies that may receive far less attention than ASML or TSMC, but each forms an essential link in tomorrow’s semiconductor value chain.

Elmos Semiconductor, Dortmund: the quiet champion of automotive

Elmos is not a household name, but anyone familiar with the automotive chip supply chain knows that this Dortmund-based company, much like Melexis, holds a remarkably strong position. The company designs and produces application-specific integrated circuits (ASICs) for the automotive sector: from ultrasonic parking sensors and ADAS applications to body control and smart lighting systems. Any visitor expecting a generalist would have been pleasantly surprised by the degree of vertical integration: Elmos has not only its own design capability, but also its own production line, including a backend and test facility that we were able to see up close.

What the tour of the testing and assembly department revealed is just how labor-intensive and knowledge-driven quality control in automotive semiconductors really is. Automotive chips must function reliably for decades under extreme conditions, temperature swings, vibrations, humidity, and the associated testing standards are therefore fundamentally more stringent than in consumer electronics. Every production step we saw reflected that awareness.

From an investor’s perspective, Elmos is interesting for several reasons. The company operates in a niche where switching costs are high: once an automotive OEM or Tier 1 supplier integrates an Elmos or Melexis chip into a design, that design is certified for the full production run of the vehicle platform. That can last ten years or more. Customer relationships are therefore structurally durable.

The conversations with investor relations and the engineers confirmed what we had already suspected: the transition to electric mobility and automated driving is not a threat to Elmos, but a structural growth engine. A typical internal combustion vehicle already contains more than €1,000 worth of semiconductors today; an electric vehicle with advanced driver assistance systems targets three to five times that amount. Elmos sits squarely in that supply chain, with specialisms that are difficult to replicate.

Aixtron: the equipment player behind compound semiconductors

In the afternoon, we travelled to Herzogenrath, near Aachen, to visit Aixtron, a relatively unfamiliar name to many, but a company of growing strategic importance for anyone closely tracking the energy transition or AI data center efficiency.

Aixtron produces MOCVD systems (Metal-Organic Chemical Vapor Deposition): specialized machines used to deposit thin, pure semiconductor layers on a substrate. Those layers are the building blocks of compound semiconductors such as gallium nitride (GaN) and silicon carbide (SiC), but also of micro-LEDs, laser diodes and RF components based on gallium arsenide and indium phosphide.

The production hall in Herzogenrath was impressive: precise, immaculate, and infused with the sense that every system leaving the facility has, quite literally, no alternative anywhere in the world. Aixtron occupies a position that in many respects resembles ASML’s in lithography: for certain deposition steps and applications, Aixtron’s global market share is dominant, and its technological lead is the result of decades of accumulated process know-how that is not easily replicated.

The investor relations briefing over lunch was unusually frank about the challenges of recent years. The decline in orders from China, driven by a combination of overcapacity among Chinese GaN and SiC players, export control restrictions and macroeconomic weakness, weighed heavily on results in 2024 and early 2025. At the same time, management explicitly stated that this downturn is cyclical, not structural. The fundamental demand for GaN- and SiC-based power electronics is driven by three secular trends that have in no way weakened: the electrification of transport, the exponential growth of data center power demand, where GaN-based power supply units are becoming standard, and the expansion of 5G infrastructure.

For us, Aixtron is an interesting case: a pure-play equipment company in a market we consider structurally important, but with an order book that is sensitive to the timing of customers’ investment cycles. The visit confirmed that the technological foundation is solid. The question remains when catch-up demand from Europe and the U.S. will sufficiently offset the Chinese slowdown, and whether management can keep revenue and profitability strong enough to navigate that bridge period comfortably.

What two days in the field teach you

Two days, five companies, hundreds of kilometers driven through the industrial backbone of northwestern Europe. The conclusion is not a single insight, but a pattern.

The AI economy is anything but an isolated software story; it rests on a full stack of hardware, infrastructure and energy. It is built on a physical infrastructure of extraordinary complexity: data centers struggling with land and power, cleanrooms requiring atomic-scale precision, equipment makers whose machines are delivered on eighteen trucks, and chipmakers who must know ten years before mass production which refrigerant their customers will use.

Any investor looking only at the AI software layer is missing the real story. Capital is flowing upstream, into infrastructure, equipment, materials and process technology. And that is precisely the space where the Econopolis Exponential Technologies Fund concentrates a large part of its focus.